VLSI & Embedded Systems

Research Overview

An important component of the Information and Communication Technology (ICT) is the Electronics and Communication, VLSI and Embedded systems (VES). The VES research group of ICT department in DA-IICT encompasses wide range of spectrum from microelectronics, digital and analog system architectures, VLSI electronic-design automation, nanotechnology, embedded systems and designs.

DA-IICT has excellent research laboratories with the availability of various state-of-the-art CAD tools for VES. The core research areas and on-going projects are in the areas of

  • Low power processor design, high performance using ARM processors, edge computing
  • Ultra-low power, ultra-low voltage IC design
  • Embedded systems and IoT
  • MEMS (Nano/Micro sensors)
  • Nanoelectronics and nanotechnology
  • AI/ML chip design robotics, system cybernetics
  • Circuits and systems – design, modeling and simulation, graphene FETs and on-chip interconnects
  • Machine learning for VLSI architectures

The VES research group has led to various publications in Book chapters, Journals and Conferences of repute, bringing several funded projects and incubation of many start-ups.

DA-IICT has a strong research group, relevant curriculum, expertise faculties and dedicated labs for supporting various Ph.D. and M.Tech. students in VLSI and Embedded systems specialization. The department provides wide range of core VLSI/Embedded systems subjects together with many electives from other domains such as machine learning, signals and systems, IoT, computational theory to make the programme more comprehensive and dynamic. The department is committed in delivering both excellences in teaching and high quality research.


  • Prof. Biswajit Mishra: Ultra Low Power and Sub-threshold Circuit Methodologies, Very Low Voltage Circuits for Wireless Sensor Networks, Digital IC Design, Power Management for Energy Harvesters, Signal Processing Hardware for Color Image Processing, Geometric Algebra and Novel Hardware
  • Prof. Rutu Parekh: Micro / Nano electronics, High voltage ASIC design, Design and simulation of hybrid CMOS nano device (logic and memory) circuits, Embedded systems & IOT
  • Prof. Sreeja Rajendran: Fault Tolerant Circuit Design, Quantum dot Cellular Automata based Circuit Designs and Thermal stability analysis, Hardware Security
  • Prof. Sujay Kadam: Control Theory, Robotics (Fixed and Mobile), Computational Neuroscience, Human-Motor-Learning, Human-Gait Measurement and Analysis
  • Prof. Tapas Kumar Maiti: Intelligent Circuits and Systems, Robotics, Cybernetics, Metaverse
  • Prof. Vinay Palaparthy: Sensors, Data Acquisition Systems, AI/ML, Embedded System Design & Internet of Things, MEMS
  • Prof. Yash Agrawal: VLSI on-chip Interconnects, Network-on-chip (NoC), Flexible Electronics and Stretchable Interconnects, Image/Video Processing using VLSI Architectures, Circuit and System Design for Bio-medical Applications, Numerical technqiues - FDTD for signal integrity analysis.

Research Groups and Labs

  • VLSI Lab
  • System Design Lab
  • VLSI and Embedded Systems Group
  • Internet of Things Group
  • Microelectronics Lab
  • Robotics and Autonomous Systems Lab

More Information Through Figure

Sponsored Research Labs

Sponsored Research

Faculty Handbook

PI/Co-PI Project Title Funding Agency Duration (Status) Amount (in Lakhs)
Prof. Rutu Parekh and Prof. Vinay Palaparthy KAVACH-Futuristic Flexible electronics based Communication system for Monitoring soldier's condition during warfare DST-GUJCOST 2022-2024 16.90
Prof. Tapas Kumar Maiti Development of Robotic Computing Accelerator DST-SERB, Govt. of India 2023 ~ 2025 14.53 lakhs
Prof. Tapas Kumar Maiti Prototyping Dog Jacket for Real-Time Rescue Operation Inspired by Robotics Technology GUJCOST, DST, Govt. of Gujarat 2022 ~ 2025 19.83 lakhs
Prof. Tapas Kumar Maiti (Co-PI) SAR Polarimetric Image Classification using Wishart Mixture Model and Convolution Neural Networks SAC, ISRO, Govt. of India 2020 ~ 2024 25.33 lakhs
Prof. Vinay Palaparthy and Prof. Yash Agrawal IoT Enabled, Smart Micro-Sensor for Integrated Plant Disease Management DST-GUJCOST 2020-2023
Prof. Vinay Palaparthy IoT Enabled, 2-D Nanomaterial Leaf Wetness Micro-Sensor On Flexible Substrate for Integrated Plant Disease Management DST-SERB (SRG) 2020-2021
Prof. Vinay Palaparthy IoT Enabled, Self-Calibrating and Self-Healing Sensor System for In-situ Agriculture Applications TIH-IoT CHANAKYA Fellowship (IIT Bombay) 2022-2026
Prof. Vinay Palaparthy A Novel Orthogonal Measurements (Sensors + Images) for Accurate Plant Disease Predictions using In-house developed TRL-6 IoT Enabled System and Machine Learning TIH-DRISHTI CHANAKYA Fellowship
(IIT Indore)
Prof. Vinay Palaparthy Detection of Trace Elements using micro-sensor array in the Human Spaceflight ISRO 2023-2025
Prof. Vinay Palaparthy Secure and Energy-efficient Mixed-domain Compute in Memory Based AI Accelerator Chip for Edge Applications Govt of India, Minsitry of E&IT, MeitY 5 Years (14.3.2024) 96,00,000
Prof. Vinay Palaparthy Impact of Climate Change on Crop Yield and Plant Disease for Major Crops In Gujarat using In-house IoT Enabled Sensor System Govt of Gujarat, Climate Change Dept. 2 Years (06.3.2024) 12,00,000
Prof. Vinay Palaparthy Highly Sensitive and Selective E-nose to Detect Hazardous Formaldehyde VOC in Human Spaceflight Govt of India, DST-SERB 2 Years (23.2.2024) 21,34,000
Prof. Vinay Palaparthy A Novel Orthogonal Measurements (Sensors+Images) for Accurate Plant Disease Predictions using In-house developed TRL-6 IoT Enabled System and Machine Learning TIH-DRISHTI CHANAKYA, Fellowship IIT, Indore 2 Years (08.2.2024) 12,41,000

Current Publications

Prof. Biswajit Mishra

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Prof. Rutu Parekh

  • P. Patel, R. Patel, J. Shroff, and R. Parekh, “Survival Strategies to live on interplanetary system MARS,” Proceedings of the Indian National Science Academy, 2022.
  • I. Kapoor, P. Singhvi, Y. Shah, B. Birua, and R. Parekh, “Simulation and Comparative study of Resonant Tunneling Diode,” Trends in Sciences, 2021. https://tis.wu.ac.th/index.php/tis/article/view/5615.
  • R. Shah, R. Parekh, and R. Dhavse, (2021) “Design strategy and simulation of single-gate SET for novel SETMOS hybridization,” Journal of Computational Electronics, vol. 20, pp. 218-229, 2021.

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Prof. Sreeja Rajendran

  • S. Rajendran and M. L. Regeena, “A Novel Algorithm for Hardware Trojan Detection through Reverse Engineering,” IEEE Transactions Computer Aided Design, vol. 41, no. 4, pp. 1154-1166, 2022, doi: 10.1109/TCAD.2021.3073855.
  • S. Rajendran and M. L. Regeena, “Sensitivity Analysis of Testability Metrics for Secure IC Design,” IET Computer and Digital Techniques, vol. 14, no. 4, pp. 157-165, 2020. doi.org/10.1049/iet-cdt.2019.0217.
  • S. Rajendran and M.L. Regeena, “Security Threats of Embedded Systems in IoT Environment,” Inventive Communication and Computational Technologies, in Lecture notes in Networks and Systems, Springer Publications, pp.745-754, 2020. doi 10.1007/978-981-15-0146-3_70.

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Prof. Sujay Dilip Kadam

  • S. D. Kadam and H. J. Palanthandalam-Madapusi, 2022, “A Note on Invertibility and Relative Degree of MIMO LTI Systems,” IFAC Journal of Systems and Control (In Press)
  • S. D. Kadam, and H. J. Palanthandalam-Madapusi, “Trackability for Discrete-Time Linear Time-Invariant Systems: A Brief Review and New Insights,” ASME Journal of Dynamical Systems, Measurement & Control, vol. 144, no. 3, pp. 031007, 2022
  • S. D. Kadam, R. A. Chavan, A. Rajiv, and H. J. Palanthandalam-Madapusi, 2019. “A Perspective on using Input Reconstruction for Command Following,” Springer Circuits, Systems, and Signal Processing, vol. 38, no. 12, pp. 5920-5930, 2019.

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Prof. Tapas Kumar Maiti

  • T. K. Maiti, S. Dutta, Y. Ochi, M. Miura-Mattausch, and H. J. Mattausch, “Electro-Mechanical Model And Its Application To Biped-Robot Stability With Force Sensors,” International Journal of Robotics and Automation, ACTA Press, vol. 37 no. 4, ISSN: 1925-7090, pp. 332-345, 2022 doi: 10.2316/J.2022.206-0623
  • K. Nagrani, and T. K. Maiti, “Neural Network Architectures for Integrated Circuits,” In International Symposium on Devices, Circuits and Systems (ISDCS 2023), Higashihiroshima, Japan, IEEE, 29-31 May 2023, pp. 1-4, DOI: 10.1109/ISDCS58735.2023.10153560
  • H. Advani, J. Patel and T. K. Maiti, “Hardware-Efficient Q-Learning Accelerator for Robot Path Planning,” in Emerging Electronic Devices, Circuits and Systems. Lecture Notes in Electrical Engineering, vol. 1004., Giri, C., Iizuka, T., Rahaman, H., Bhattacharya, B.B. (eds), Springer, Singapore, 01 May 2023, pp. 1-10, doi: 10.1007/978-981-99-0055-8_1, ISBN: 9789819900558.

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Prof. Vinay Palaparthy

  • N. Alsadun, S. Surya K. S. Patle, V. S. Palaparthy, O. Shekhah, K. N. Salama, M. Eddaoudi, “Institution of metal-organic frameworks as a highly sensitive and selective layer in-field integrated soil moisture capacitive sensor,” Accepted in ACS Applied Materials & Interfaces, 2023. (IF: 10.383)
  • P. Khaparde, K. S. Patle, Y. Agrawal, H. Borkar, J. Gangwar, A. K. Roy, and V. S. Palalparthy, "Experimental Investigation of Leaf Wetness Sensing Properties of MoS2 Nanoflowers-Based Flexible Leaf Wetness Sensor." Accepted in IEEE Sensors Letters, 2022
  • R. Saini, K. S. Patle, A. Kumar, S. G. Surya, and V. S. Palaparthy, "Attention-Based Multi-Input Multi-Output Neural Network for Plant Disease Prediction Using Multisensor System," IEEE Sensors Journal, vol. 22, no. 24, pp. 24242-24252, 2022. (IF: 4.325).

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Prof. Yash Agrawal

  • Book: Y. Agrawal, Kavicharan Mummaneni, and P. Uma Sathyakam, “Emerging Interconnect Technologies for Integrated Circuit and Flexible Electronics,” Springer Tracts in Electrical and Electronics Engineering, ISSN: 2731-4200, 2023
  • G. Bhatti, T. Pathade, Y. Agrawal, V. Palaparthy, and M. G. Kumar, “Neural Network Based Fast and Intelligent Signal Integrity Assessment Model for Emerging MWCNT Bundle On-chip Interconnects in Integrated Circuit,” Taylor and Franics: IETE – Journal of Research, Taylor and Francis, 2023
  • T. Patahde, Y. Agrawal, R. Parekh, and M.G. Kumar, “Structure fortification of mixed CNT bundle interconnects for nano integrated circuits using constraint-based particle swarm optimization,” IEEE Transactions on Nanotechnology, 2021

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Media Gallery

Meet Dr. Tapas Kumar Maiti: Pioneering Research in Robotics and Cybernetics

Events and Activities

  • Expert Talk: IEEE Expert Talks on Emerging Trends in Semiconductor Devices
    Date: 29th July 2023
    Coordinators: Prof. Anil Roy, Prof. Sreeja Rajendran, and Prof. Yash Agrawal
  • Workshop: AI/ML Algorithms and Applications in VLSI Design and Technology
    Date: 17th July – 22nd July 2023
    Coordinators: Prof. Sreeja Rajendran and Prof. Yash Agrawal
  • Workshop: Image Processing and its Applications using VLSI Architectures
    Date: 03rd July – 08th July 2023
    Coordinators: Prof. Manish Khare and Prof. Yash Agrawal
  • Workshop: Hardware Assisted Security for Fog Computing based IoT Networks
    Date: 11th July – 17th July 2022
    Coordinators: Prof. Yash Agrawal and Prof. Sreeja Rajendran
  • Workshop: Image Processing using VLSI Architectures
    Date: 20th May – 24th May 2019
    Coordinators: Prof. Yash Agrawal and Prof. Manish Khare
  • Workshop: Device Modeling and Circuit Simulation for Integrated Circuit Designs
    Date: 10th Dec – 14th Dec 2018
    Coordinators: Prof. Yash Agrawal and Prof. Rutu Parekh
  • Workshop: Digital System Architecture Realization using HDL and FPGA
    Date: 04th June – 08th June 2018
    Coordinators: Prof. Yash Agrawal and Prof. Amit Bhatt
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