Dhirubhai Ambani University (DAU), Gandhinagar, Gujarat, India is hosting a one-week workshop titled “RTL to GDS-II: VLSI Design and Hardware Security for Trusted Memory Systems” from 06^th to 10^th July 2026.

This program is designed to offer participants a comprehensive understanding of the RTL to GDS-II design flow, along with key concepts in VLSI design, hardware security and memory systems. The course combines theoretical insights with extensive hands-on training sessions.

The workshop is tailored for industry professionals, faculty members, Ph.D. scholars, postgraduate students, and senior undergraduate students. Participants will gain practical exposure through hands-on sessions using Cadence and SPICE EDA tools.

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Participants from Gujarat are eligible for a full refund of the ₹5,000 registration fee, subject to maintaining at least 75% attendance during the workshop.

For any queries, please contact:

Workshop Coordinators:

Prof. Sreeja Rajendran (+91-9074703191 | sreeja_rajendran@dau.ac.in)

Prof. Yash Agrawal (+91-9882114669 | yash_agrawal@dau.ac.in)

AIP Cell, DAU:

Mr. Pankit Gandhi (+91-079-68261666 | aip@dau.ac.in)